Ronald Guilmet on 3 Jan 2018 10:37:30 -0800


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Re: [PLUG] The mysterious case of the Linux Page Table Isolation patches


My first thought was that hardware is cheap today. I think CISC has shorting instructions, but uses more memory. When the hardware (RAM) was the cost of a car, they pushed the software to take some of the burden, right?


Ron


On 1/3/2018 12:46 PM, Rich Freeman wrote:
On Wed, Jan 3, 2018 at 12:23 PM, George Zipperlen
<george.zipperlen@mail.com> wrote:
How is it that CISC beat out RISC for high performance computing?
I haven't payed attention to hardware for 20 years,  but I still remember
the Pentium FDIV bug...
I wouldn't be surprised if some around here know more about this topic
than I do, but here are some of the factors I'm aware of:

Compatibility is a huge one.  If you have software already written for
x86 then running it on x86 is usually going to be easier than running
it on anything else.  I think this is less of an issue for HPC, but I
bet it is still a factor.

Commodity hardware costs probably are also a factor.  If Intel is
making a bazillion x86 chips due to desktop demand, buying a few
thousand for your cluster is going to be really easy and cheap
compared to something that performs better but which requires more
exotic hardware.  Google is pretty famous for doing all its data
crunching on commodity hardware, not even investing in server-grade
x86 hardware.

Then you get R&D investment.  Due to the size of that desktop market
Intel spends a fortune on making its x86 processors as capable as
possible.  Even if the architecture handicaps them the sheer scale of
their investment probably pays off.

Those are all basically economic factors.  As far as the technology
itself goes I think just about all new CPU designs are RISC, which
suggests that RISC is inherently better.  Itanium went the VLIW
direction, which is even more compiler-dependent than RISC, and that
died due to economics before the model was really proven either way
(IMO).

I can't really think of any technical reasons why CISC would beat RISC
other than legacy code that can't be recompiled using a decent
compiler.  To the degree that CISC can give hints to the processor to
better perform speculative execution I'd argue that a RISC instruction
set could be created that does the same (have the compiler always
output code that makes a particular branch the most common one).


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